Parallelizing Heuristics for Generating Synchronizing Sequences - Testing Software and Systems (ICTSS 2016) Access content directly
Conference Papers Year : 2016

Parallelizing Heuristics for Generating Synchronizing Sequences

Sertaç Karahoda
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Osman Tufan Erenay
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Uraz Cengiz Türker
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Husnu Yenigun
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Abstract

Synchronizing sequences are used in the context of finite state machine based testing in order to initialize an implementation to a particular state. The cubic complexity of even the fastest heuristic algorithms known in the literature to construct a synchronizing sequence can be a problem in practice. In order to scale the performance of synchronizing heuristics, some algorithmic improvements together with a parallel implementation of these heuristics are proposed in this paper. An experimental study is also presented which shows that the improved/parallel implementation can yield a considerable speedup over the sequential implementation.
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hal-01643717 , version 1 (21-11-2017)

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Sertaç Karahoda, Osman Tufan Erenay, Kamer Kaya, Uraz Cengiz Türker, Husnu Yenigun. Parallelizing Heuristics for Generating Synchronizing Sequences. 28th IFIP International Conference on Testing Software and Systems (ICTSS), Oct 2016, Graz, Austria. pp.106-122, ⟨10.1007/978-3-319-47443-4_7⟩. ⟨hal-01643717⟩
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