On Implementable Timed Automata - Formal Techniques for Distributed Objects, Components, and Systems
Conference Papers Year : 2020

On Implementable Timed Automata

Abstract

Generating code from networks of timed automata is a well-researched topic with many proposed approaches, which have in common that they not only generate code for the processes in the network, but necessarily generate additional code for a global scheduler which implements the timed automata semantics. For distributed systems without shared memory, this additional component is, in general, undesired.In this work, we present a new approach to the generation of correct code (without global scheduler) for distributed systems without shared memory yet with (almost) synchronous clocks if the source model does not depend on a global scheduler. We characterise a set of implementable timed automata models and provide a translation to a timed while language. We show that each computation of the generated program has a network computation path with the same observable behaviour.
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Dates and versions

hal-03283229 , version 1 (09-07-2021)

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Sergio Feo-Arenis, Milan Vujinović, Bernd Westphal. On Implementable Timed Automata. 40th International Conference on Formal Techniques for Distributed Objects, Components, and Systems (FORTE), Jun 2020, Valletta, Malta. pp.78-95, ⟨10.1007/978-3-030-50086-3_5⟩. ⟨hal-03283229⟩
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