Robust FinFET Schmitt Trigger Designs for Low Power Applications - VLSI-SoC: New Technology Enabler 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019 Cusco, Peru, October 6–9, 2019 Revised and Extended Selected Papers Access content directly
Conference Papers Year : 2020

Robust FinFET Schmitt Trigger Designs for Low Power Applications


The IoT development alongside with the more pronounced impact of process variability in modern technology nodes, is the central reason to control variability impact. Given the broad set of IoT devices running on battery-oriented environments, energy consumption should be minimal and the operation reliable. Schmitt Trigger inverters are frequently used for noise immunity enhancement, and have been recently applied to mitigate radiation effects and variability impact. Yet, Schmitt Trigger operation at nominal voltage still introduces high deviation on power consumption. Thus, the main contribution of this work is to identify the relationship between transistor sizing, supply voltage, energy, and process variability robustness to achieve a minimal energy consumption circuit while keeping robustness. On average, scenarios with a lower supply voltage applied on layouts with a smaller number of fins, presented adequate robustness in high variability scenarios. Exploring voltage and transistor sizing made possible a reduction of about 24.84% on power consumption.
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Dates and versions

hal-03476603 , version 1 (13-12-2021)


Attribution - CC BY 4.0



Leonardo B. Moraes, Alexandra Lackmann Zimpeck, Cristina Meinhardt, Ricardo Reis. Robust FinFET Schmitt Trigger Designs for Low Power Applications. 27th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2019, Cusco, Peru. pp.45-68, ⟨10.1007/978-3-030-53273-4_3⟩. ⟨hal-03476603⟩
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