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Conference Papers Year : 2011

Emerging Technologies and Nanoscale Computing Fabrics


This chapter describes a reconfigurable computing architecture based on clusters of regular matrices of fine-grain dynamically reconfigurable cells using double-gate carbon nanotube field effect transistors (DG-CNTFET), which exhibit ambivalence (p-type or n-type behaviour depending on the back-gate voltage). Hierarchical function mapping methods suitable for the cluster of matrices structure have been devised, and various benchmark circuits mapped to the architecture. This work shows how circuit and architecture designers can work with emerging technology concepts to examine its suitability for use in computing platforms.
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hal-01569364 , version 1 (26-07-2017)




Ian O’connor, Junchen Liu, Jabeur Kotb, Nataliya Yakymets, Renaud Daviot, et al.. Emerging Technologies and Nanoscale Computing Fabrics. 17th International Conference on Very Large Scale Integration (VLSISOC), Oct 2009, Florianópolis, Brazil. pp.1-20, ⟨10.1007/978-3-642-23120-9_1⟩. ⟨hal-01569364⟩
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