Computer Architecture Development: From the BESM-6 Computer to Supercomputers

Yuri I. Mitropolski

doi:10.1007/978-3-642-22816-2_4

Conference Papers Year : 2011

Computer Architecture Development: From the BESM-6 Computer to Supercomputers

(1)

Yuri I. Mitropolski

Function : Author
PersonId : 1013534

Russian Academy of Sciences [Moscow]

Abstract

This work outlines the architecture and main features of the BESM-6 computer and data processing system AS-6. It also discusses the development of the “Electronika SS BIS-1” supercomputer system as well as the principle results of the research on multi-architecture (heterogeneous) supercomputer systems.

Keywords

Supercomputer architecture heterogeneous multicomputer systems pipelined vector processors multi-architecture supercomputer systems scalable heterogeneous chip multiprocessors

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Computer Science [cs]

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978-3-642-22816-2_4_Chapter.pdf (240.5 Ko)

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https://inria.hal.science/hal-01568389

Submitted on : Tuesday, July 25, 2017-11:42:51 AM

Last modification on : Tuesday, July 14, 2020-11:04:07 AM

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hal-01568389 , version 1 (25-07-2017)

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HAL Id : hal-01568389 , version 1
DOI : 10.1007/978-3-642-22816-2_4

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Yuri I. Mitropolski. Computer Architecture Development: From the BESM-6 Computer to Supercomputers. 1st Soviet and Russian Computing (SoRuCom), Jul 2006, Petrozavodsk, Russia. pp.26-30, ⟨10.1007/978-3-642-22816-2_4⟩. ⟨hal-01568389⟩

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Computer Architecture Development: From the BESM-6 Computer to Supercomputers

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